Description |
18-mbit (512K x 36/1M x 18) Flow-Through sRAM; Architecture: standard sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II sRAM 4-Word burst Architecture; Architecture: QDR-II, 4 Word burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II sRAM 2-Word burst Architecture; Architecture: DDR-II CIO, 2 Word burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) pipelined sRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) pipelined sRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V 18-mbit (512K x 36/1M x 18) pipelined sRAM; Architecture: standard sync, Pipeline sCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) pipelined sRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit QDR(TM)-II sRAM 2-Word burst Architecture; Architecture: QDR-II, 2 Word burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 18-mbit (512K x 36/1M x 18) Flow-Through sRAM; Architecture: standard sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II sRAM 2-Word burst Architecture; Architecture: QDR-II, 2 Word burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through sRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) pipelined sRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II sRAM 2-Word burst Architecture; Architecture: QDR-II, 2 Word burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) pipelined sync sRAM; Architecture: standard sync, Pipeline sCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) pipelined sRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) pipelined sRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit DDR-II sRAM 2-Word burst Architecture; Architecture: DDR-II CIO, 2 Word burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V sync sRAM; Architecture: QDR-II, 2 Word burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II sRAM 2-Word burst Architecture; Architecture: DDR-II CIO, 2 Word burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit(2M x 36/4M x 18/1M x 72) pipelined sRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) pipelined sRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II sRAM 4-Word burst Architecture; Architecture: QDR-II, 4 Word burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit (2M x 36/4M x 18/1M x 72) pipelined sRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) pipelined sync sRAM; Architecture: standard sync, Pipeline sCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II sRAM 4-Word burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit DDR-II sRAM 2-Word burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) pipelined sync sRAM; Architecture: standard sync, Pipeline sCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOs微机 72-Mbit DDR-II sRAM 2-Word burst Architecture; Architecture: DDR-II CIO, 2 Word burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOs微机 18-mbit (512K x 36/1M x 18) Flow-Through sRAM; Architecture: standard sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOs微机 sINGLE-CHIP 8-BIT CMOs MICROCOMPUTER 单芯位CMOs微机 72-Mbit(2M x 36/4M x 18/1M x 72) pipelined sRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOs微机 72-Mbit(2M x 36/4M x 18/1M x 72) pipelined sRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOs微机 72-Mbit QDR(TM)-II sRAM 4-Word burst Architecture; Architecture: QDR-II, 4 Word burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOs微机 72-Mbit QDR(TM)-II sRAM 2-Word burst Architecture; Architecture: QDR-II, 2 Word burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOs微机 36-Mbit QDR(TM)-II sRAM 4-Word burst Architecture; Architecture: QDR-II, 4 Word burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOs微机 sINGLE-CHIP 8-BIT CMOs MICROCOMPUTER 单芯8位CMOs微机 sync sRAM; Architecture: QDR-II, 2 Word burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOs微机 36-Mbit DDR-II sRAM 2-Word burst Architecture; Architecture: DDR-II CIO, 2 Word burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOs微机 72-Mbit DDR-II sRAM 2-Word burst Architecture; Architecture: DDR-II CIO, 2 Word burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit QDR(TM)-II sRAM 2-Word burst Architecture; Architecture: QDR-II, 2 Word burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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