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Bourns, Inc.
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| Part No. |
W3EG2256M72ASSR265JD3XG
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| OCR Text |
...double-data-rate architecture ddr200, and ddr266: ? jedec design speci? cations bi-directional data strobes (dqs) differential clock inputs (ck & ck#) programmable read latency 2,2.5 (clock) programmable burst length (2,4,8) p... |
| Description |
4GB - 2x256Mx72 DDR SDRAM REGISTERED ECC, w/PLL 4GB 2x256Mx72 ECC的DDR SDRAM的注册，瓦特/锁相
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| File Size |
219.81K /
14 Page |
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it Online |
Download Datasheet
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Qimonda
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| Part No. |
HYB25DC512160B
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| OCR Text |
... 2, 4, or 8 ? cas latency: 1.5 (ddr200 only), 2, 2.5, 3 ? auto precharge option for each burst access ? auto refresh and self refresh modes ? ras-lockout supported t rap = t rcd ?7.8 s maximum average periodic refresh interval ? 2.5 v (... |
| Description |
512-Mbit Double-Data-Rate SDRAM
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| File Size |
1,168.00K /
35 Page |
View
it Online |
Download Datasheet |
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Optrex America, Inc.
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| Part No. |
W3EG7264S-AD4
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| OCR Text |
...uble-data-rate architecture ddr200, ddr266 ddr333 ? jedec design speci? cations bi-directional data strobes (dqs) differential clock inputs (ck & ck#) programmable read latency 2,2.5 (clock) programmable burst length (2,... |
| Description |
512MB - 2x32Mx72 DDR ECC SDRAM UNBUFFERED w/PLL 512MB 2x32Mx72的DDR ECC的内存缓冲瓦锁相
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| File Size |
199.52K /
13 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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