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				ICST[Integrated Circuit Systems]
Part No.	ICS9248-61 ICS9248F-61 AV9248F-61
OCR Text	...w power operation. CPU_STOP# is synchronized by the ICS9248-61. The minimum that the CPUCLK is enabled (CPU_STOP# high pulse) is 100 CPUCLKs. All other clocks will continue to run while the CPUCLKs are disabled. The CPUCLKs will always be s...
Description	Frequency timing generator for Pentium II system BX Mobile Main Clock with Power Management Feature, Supports 66.6 - 100MHz Frequency Timing Generator for Pentium II Systems Frequency Generator & Integrated Buffers
File Size	288.93K / 9 Page	View it Online	Download Datasheet

				Integrated Device Technology, Inc. ICST[Integrated Circuit Systems]
Part No.	ICS9248-66 ICS9248YF-66 ICS9248YF-66LF
OCR Text	...U clock) and must be internally synchronized to the external output. All other clocks will continue to run while the CPU clocks are disabled. The CPU clocks must always be stopped in a low state and started in such a manner as to guarantee ...
Description	133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 SSOP-48 Frequency Timing Generator for PENTIUM II Systems 820 Single Chip Clock, Supports 100 - 133MHz
File Size	378.95K / 11 Page	View it Online	Download Datasheet

				CYPRESS[Cypress Semiconductor] Cypress Semiconductor Corp.
Part No.	7C4282V_92V-15 7C4282V_92V-25 CY7C4282V CY7C4282V-10ASC CY7C4282V-15ASC CY7C4282V-15ASI CY7C4282V-25ASC CY7C4292V-25ASC 7C4282V_92V-10 CY7C4292V CY7C4292V-10ASC CY7C4292V-15ASC CY7C4292V-15ASI 7C4282V/92V-10 7C4282V/92V-25 7C4282V/92V-15 7C4292V
OCR Text	...s LOW, the FIFO is empty. EF is synchronized to RCLK. When FF is LOW, the FIFO is full. FF is synchronized to WCLK. When PAE is LOW, the FIFO is almost empty based on the almost empty offset value programmed into the FIFO. PAE is synchroniz...
Description	64K/128Kx9 Low Voltage Deep Sync FIFOsw/ Retransmit & Depth Expansion From old datasheet system 64K/128Kx9 Low Voltage Deep Sync FIFOs w/ Retransmit & Depth Expansion 128Kx9 Low Voltage Deep Sync FIFOs w/ Retransmit & Depth Expansion(128Kx9低压深同步先进先出（FIFO 64Kx9 Low Voltage Deep Sync FIFOs w/ Retransmit & Depth Expansion(64Kx9 深同步先进先出（FIFO中断发深度扩展) 128Kx9 Low Voltage Deep Sync FIFOs w/ Retransmit & Depth Expansion(128Kx9低压深同步先进先出（FIFO 128Kx9低电压后同步FIFO的瓦重发
File Size	236.87K / 15 Page	View it Online	Download Datasheet

				Philips
Part No.	SAA6588_2 SAA6588/V2 SAA6588T/V2
OCR Text	...bit sequence. If the decoder is synchronized, syndrome calculation is activated only after 26 data bits for each new block received. Under RBDS reception situation, beside the RDS block sequences with (A, B, C/C', D) offset also block seque...
Description	SAA6588; RDS/RBDS pre-processor From old datasheet system
File Size	139.23K / 32 Page	View it Online	Download Datasheet

				Linear Technology
Part No.	LTP5901 LTP5902 LTP5902-IPM
OCR Text	...a at 0 dbm). with dust?s time - synchronized smartmesh ip networking, all mo tes in the network may route and may be ba ttery-powered, powered by an energy-harve ster, or line powered. smartmesh ip?s time-synchronized mesh networking comb...
Description	2.4 GHz 802.15.4 EternaTM Mote Modules
File Size	941.91K / 30 Page	View it Online	Download Datasheet

				MITSUBISHI[Mitsubishi Electric Semiconductor]
Part No.	M38B57 M38B57M6-101FP M38B57M6-123FP M38B57M6-126FP M38B57M6-147FP M38B57M6-150FP M38B57M6-154FP M38B57M6-166FP M38B57MC M38B57MC-111FP M38B57MC-132FP M38B57MCH-E206FP M38B57MCH-G222FP M38B57MCH-P202FP M38B57MCH-P218FP M38B59MFH-A126FP M38B59MFH-E106FP M38B59MFH-E107FP M38B59MFH-E110FP M38B59MFH-E111FP M38B59MFH-E112FP M38B59MFH-P113FP 38B5GROUP E38B5G M38B53M4-059FP M38B53M4-060FP
OCR Text	..., 16-bit ! 1 Serial I/O1 (Clock-synchronized) .................................... 8-bit ! 1 ...................... (max. 256-byte automatic transfer function) Serial I/O2 (UART or Clock-synchronized) ..................... 8-bit ! 1 * ...
Description	From old datasheet system SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
File Size	982.32K / 69 Page	View it Online	Download Datasheet

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