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				STMicroelectronics
Part No.	L4975 L4975A
OCR Text	...e constant. Multiple L4975A are synchronized by connecting pin 13 inputs together or via an external syncr. pulse. 5.1V Vref Device Reference Voltage. Internal Start-up Circuit to Drive the Power Stage. 4 5 6 7 8 9 10 11 RESET OUT RES...
Description	5A SWITCHING REGULATOR
File Size	357.92K / 21 Page	View it Online	Download Datasheet

				PHILIPS[Philips Semiconductors]
Part No.	UMA1020AM UMA1020
OCR Text	...ividers of that synthesizer are synchronized to avoid the possibility of random phase errors on power-up. 1995 Jul 06 7 Philips Semiconductors Product specification Low-voltage dual frequency synthesizer for radio telephones ...
Description	Low-voltage dual frequency synthesizer for radio telephones
File Size	152.20K / 20 Page	View it Online	Download Datasheet

				NEC[NEC]
Part No.	UPD16873 UPD16873A UPD16873AMC-6A4 UPD16873B UPD16873BMC-6A4 UPD16873C UPD16873CMC-6A4 UPD16873MC-6A4
OCR Text	.... * Hall bias switch built in. (synchronized STB signal.) * Loading into 30-pin plastic TSSOP (300 mil). ORDERING INFORMATION Part number Function normal-PWM/3 phase IND normal-PWM/1 phase IND 30-pin plastic TSSOP (7.62 mm (300)) synchr...
Description	MONOLITHIC 3-ASPECT SPINDLE MOTOR DRIVER
File Size	100.83K / 16 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS9176-01 ICS9176M-01 AV9176M-01 ICS9176Q-01
OCR Text	.... The ICS9176-01 has 10 outputs synchronized in phase and fre-quency to an input clock. The internal phase locked loop (PLL) acts either as a 1X clock multiplier or a 1/2X clock multiplier depending on the state of the input control pins T0...
Description	Low Skew Output Buffer
File Size	377.43K / 8 Page	View it Online	Download Datasheet

				Integrated Circuit Syst... ICST[Integrated Circuit Systems]
Part No.	ICS9248-103 ICS9248YF-103 ICS9248F-103
OCR Text	...w power operation. CLK_STOP# is synchronized by the ICS9248-103. The minimum that the CPU clock is enabled (CLK_STOP# high pulse) is 100 CPU clocks. All other clocks will continue to run while the CPU clocks are disabled. The CPU clocks wil...
Description	Frequency Generator & Integrated Buffers for PENTIUM/ProTM Frequency generator and intefrated buffer for Pentium/PRO
File Size	390.58K / 16 Page	View it Online	Download Datasheet

				Integrated Circuit Syst... ICST[Integrated Circuit Systems] Integrated Device Technology, Inc.
Part No.	ICS9248-110 ICS9248YF-110 ICS9248YF-110LF
OCR Text	...w power operation. CPU_STOP# is synchronized by the ICS9248-110. All other clocks will continue to run while the CPUCLKs clocks are disabled. The CPUCLKs will always be stopped in a low state and start in such a manner that guarantees the h...
Description	K7; 750/760; System Clock Chip: 90 - 150MHz CPU AMD-K7TM System Clock Chip Frequency Generator & Integrated Buffers 115 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48
File Size	150.77K / 14 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS9248-20 ICS9248F-20 AV9248F-20
OCR Text	...w power operation. CPU_STOP# is synchronized by the ICS9248-20. The minimum that the CPUCLK is enabled (CPU_STOP# high pulse) is 100 CPUCLKs. All other clocks will continue to run while the CPUCLKs are disabled. The CPUCLKs will always be s...
Description	Pentium/PRO system clock chip Pentium/ProTM System Clock Chip
File Size	340.17K / 11 Page	View it Online	Download Datasheet

				Integrated Device Technology, Inc. ICST[Integrated Circuit Systems]
Part No.	ICS9248-50 ICS9248YG-50-T ICS9248YG-50LF-T
OCR Text	...w power operation. CPU_STOP# is synchronized by the ICS9248-50. The minimum that the CPUCLK is enabled (CPU_STOP# high pulse) is 100 CPUCLKs. All other clocks will continue to run while the CPUCLKs are disabled. The CPUCLKs will always be s...
Description	100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 6.10 MM, 0.65 MM PITCH, TSSOP-28 Frequency Timing Generator for Pentium II Systems 频率的奔腾II系统时序发生
File Size	260.46K / 11 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems] http://
Part No.	ICS9248-55 ICS9248BF-55
OCR Text	...w power operation. CPU_STOP# is synchronized by the ICS9248-55. The minimum that the CPUCLK is enabled (CPU_STOP# high pulse) is 100 CPUCLKs. All other clocks will continue to run while the CPUCLKs are disabled. The CPUCLKs will always be s...
Description	Pentium/Pro/IITM System Clock Chip 奔腾/专业/ IITM系统时钟芯片 BX Main Clock, Supports 66.6 - 100MHz
File Size	268.23K / 10 Page	View it Online	Download Datasheet

				TE Connectivity, Ltd. Integrated Device Technology, Inc. ICST[Integrated Circuit Systems]
Part No.	ICS9248-56 ICS9248YG-56-T ICS9248YG-56LF-T ICS9248F-56
OCR Text	...w power operation. CPU_STOP# is synchronized by the ICS9248-56. The minimum that the CPUCLK is enabled (CPU_STOP# high pulse) is 100 CPUCLKs. All other clocks will continue to run while the CPUCLKs are disabled. The CPUCLKs will always be s...
Description	Peripheral IC 外围芯片 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 4.40 MM, 0.65 MM PITCH, TSSOP-28 20-Bit Buffers/Drivers With 3-State Outputs 56-TSSOP -40 to 85 Frequency Generator & Integrated Buffers Frequency Timing Generator for Pentium II Systems BX Mobile Main Clock with Real Time Spread, Supports 66.6 - 100MHz
File Size	262.48K / 11 Page	View it Online	Download Datasheet

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