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http:// IDT[Integrated Device Technology] Integrated Device Technology, Inc. Cypress Semiconductor, Corp. INTEGRATED DEVICE TECHNOLOGY INC Integrated Device Technolog...
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| Part No. |
IDT72235LB IDT72205LB IDT72225LB IDT72215LB IDT72245LB IDT72245LB15G IDT72245LB15GB IDT72245LB15J IDT72245LB15JB IDT72245LB15JI IDT72245LB15PF IDT72245LB15PFB IDT72245LB15PFI IDT72245LB15TF IDT72245LB15TFB IDT72245LB15TFI IDT72245LB25G IDT72245LB25GB IDT72245LB25J IDT72245LB25JB IDT72245LB25JI IDT72245LB25PF IDT72245LB25PFB IDT72245LB25PFI IDT72245LB25TF IDT72245LB25TFB IDT72245LB25TFI IDT72245LB50G IDT72245LB50GB IDT72245LB50J IDT72245LB50JB IDT72245LB50PF IDT72245LB50PFB IDT72245LB50TF IDT72245LB50TFB IDT72225LB15PF IDT72225LB15PFB IDT72225LB15PFI IDT72235LB20G IDT72235LB20GB IDT72235LB20J IDT72235LB20JB IDT72235LB20PF IDT72235LB20PFB IDT72235LB20TF IDT72235LB20TFB IDT72215LB25TF IDT72215LB10J IDT72215LB10JI IDT72215LB10PF IDT72215LB10PFI IDT72215LB10TF IDT72215LB10TFI IDT72215LB15JI IDT72215LB15PFI IDT72215LB15TFI IDT72225LB10J IDT72225LB10JI IDT72225LB10PF IDT72225LB10TF IDT72225LB10TFI IDT72225LB15G IDT72225LB15GB IDT72225LB15J IDT72225LB15JB IDT72225LB15JI IDT72225LB15TF IDT72225LB15TFB IDT72225LB15TFI IDT72225LB20G IDT72225LB20GB IDT72225LB20J IDT72225LB20JB IDT72225LB20PF IDT72225LB20PFB IDT72225LB20TF IDT72225LB20TFB IDT72225LB25G IDT72225LB25GB IDT72225LB25J IDT72225LB25J
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| OCR Text |
...WCLK), and an input enable pin (wen). Data is read into the synchronous FIFO on every clock when wen is asserted. The output port is controlled by another clock pin (RCLK) and another enable pin (REN). The read clock can be tied to the writ... |
| Description |
4K x 18 SyncFIFO, 5.0V 2K x 18 SyncFIFO, 5.0V 1K x 18 SyncFIFO, 5.0V 512 x 18 SyncFIFO, 5.0V 256 x 18 SyncFIFO, 5.0V CMOS SyncFIFO? Low Voltage 28-Bit Flat Panel Display Link Serializers; Package: TSSOP; No of Pins: 56; Container: Tape & Reel TUBING, TFE 20GA TUBE, THN, TEF, NAT, 24AWG 256 X 18 OTHER FIFO, 10 ns, PQFP64 PLASTIC, TQFP-64 256 X 18 OTHER FIFO, 15 ns, PQFP64 PLASTIC, TQFP-64 CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 256 X 18 OTHER FIFO, 15 ns, PQFP64 CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 512 X 18 OTHER FIFO, 15 ns, PQFP64 CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 2K X 18 OTHER FIFO, 15 ns, PQFP64 CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 1K X 18 OTHER FIFO, 15 ns, PQFP64 CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 4K X 18 OTHER FIFO, 15 ns, PQFP64 CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 的CMOS SyncFIFOO 256 × 1812 × 18024 × 18048 × 18096 × 18 CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 1K X 18 OTHER FIFO, 6.5 ns, PQCC68 CMOS SyncFIFOO 256 x 18, 512 x 18, 1024 x 18, 2048 x 18 and 4096 x 18 2K X 18 OTHER FIFO, 6.5 ns, PQFP64
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| File Size |
181.57K /
16 Page |
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IDT
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| Part No. |
IDT72T40108 IDT72T4088IDT72T4098 IDT72T4098
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| OCR Text |
...IAGRAM
D0 -Dn (x40, x20, x10)
wen WCS WCLK SREN SEN SCLK WSDR
INPUT REGISTER
OFFSET REGISTER
SI SO FF/IR PAF EF/OR PAE FWFT FSEL0 FSEL1
WRITE CONTROL LOGIC RAM ARRAY 16,384 x 40, 32,768 x 40 65,536 x 40 131,072 x 40
FLAG LO... |
| Description |
2.5 VOLT HIGH-SPEED TeraSync? DDR/SDR FIFO 40-BIT CONFIGURATION 2.5 VOLT HIGH-SPEED TeraSync™ DDR FIFO 40-BIT CONFIGURATION
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| File Size |
456.68K /
52 Page |
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it Online |
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Winsonic
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| Part No. |
WM201-RTL8723-1
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| OCR Text |
...ccx support up to v5.0 no.290-1 wen chung rd., taoyuan city, taiwan, r.o.c. tel : 886-3-3704789 fax : 886-3-3704722 www.ewinsonic.com
bluetooth features ? bt v.2.1+edr/bt 3.0/ bt 4.0 dual - mode low energy . ? class1, class... |
| Description |
11b/g/n WLAN and Bluetooth v2.1 / 3.0 / 4.0 single chip solution
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| File Size |
395.13K /
7 Page |
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it Online |
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IDT
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| Part No. |
IDT72275 IDT72285
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| OCR Text |
...
FUNCTIONAL BLOCK DIAGRAM
wen
WCLK
D0 -D17
LD SEN
INPUT REGISTER
OFFSET REGISTER FF/IR PAF EF/OR PAE HF FWFT/SI
WRITE CONTROL LOGIC
RAM ARRAY 32,768 x 18 65,536 x 18
FLAG LOGIC
WRITE POINTER
READ POINTER
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| Description |
CMOS SuperSync FIFO?
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| File Size |
285.58K /
25 Page |
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it Online |
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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
V805L15PFI9 V805L20PF V805L10PF
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| OCR Text |
...clk), and an input enable pin ( wen ). data is read into the synchronous fifo on every clock when wen is asserted. the output port of each fifo bank is controlled by another clock pin (rclk) and another enable pin ( ren ). the read clock ... |
| Description |
256 X 18 BI-DIRECTIONAL FIFO, 10 ns, PQFP128 256 X 18 BI-DIRECTIONAL FIFO, 12 ns, PQFP128 256 X 18 BI-DIRECTIONAL FIFO, 6.5 ns, PQFP128
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| File Size |
324.56K /
26 Page |
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it Online |
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