| |
|
 |
Zarlink
|
| Part No. |
MT90520
|
| OCR Text |
... Dual-mode (ATM-end or PHY-end) utopia port operates in Level 1 or Level 2 mode for connection to external PHY or ATM devices with utopia clock rate up to 52 MHz TDM bus provides 8 bidirectional serial streams at 1.544, 2.048, or 4.096 MHz ... |
| Description |
8-Port Primary Rate Circuit Emulation AAL1 SAR
|
| File Size |
1,684.49K /
181 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
Zarlink
|
| Part No. |
MT90528
|
| OCR Text |
... Dual-mode (ATM-end or PHY-end) utopia port operates in Level 1 or Level 2 mode for connection to external PHY or ATM devices with utopia clock rate up to 52 MHz TDM bus provides 28 bidirectional serial streams at 1.544, 2.048, or 4.096 MHz... |
| Description |
28-Port Primary Rate Circuit Emulation AAL1 SAR
|
| File Size |
1,621.21K /
189 Page |
View
it Online |
Download Datasheet |
| |
|
|
Zarlink
|
| Part No. |
MT92210
|
| OCR Text |
...supports 10/100 MII, POS-PHY or utopia level 1/2 Secondary network interface supports utopia level 1 Proprietary Adaptive Silence Suppression Less than 2.5 watts of power 608 pin PBGA package
(8K to16.384M PLL)
M T9043
optional
... |
| Description |
1023 Channel Voice Over IP Processor
|
| File Size |
1,391.46K /
190 Page |
View
it Online |
Download Datasheet |
| |
|
|
pmc
|
| Part No. |
1990883
|
| OCR Text |
...UNI-DUPLEXs "back-to-back" as a utopia serializer, the backpressure mechanism may limit the data throughput to no more than one half of the theoretical maximum throughput of the LVDS link1. In order to understand the root cause and resoluti... |
| Description |
From old datasheet system
|
| File Size |
171.96K /
13 Page |
View
it Online |
Download Datasheet |
| |
|
|
pmc
|
| Part No. |
1990887
|
| OCR Text |
... added to SOC and CA signals of utopia buses. Clarifications made to document. Byte Write Enable lines corrected (swapped) on AAL1gator-32 SRAMs in schematics. Added appendix D for DS3 Adaptive Clock Recovery VHDL source code, and changed d... |
| Description |
From old datasheet system
|
| File Size |
1,560.77K /
94 Page |
View
it Online |
Download Datasheet |
| |
|
|
pmc
|
| Part No. |
1991722
|
| OCR Text |
... and descrambling. * Provides a utopia Level 2-compliant system interface. * Provides synchronous cell transmit and receive FIFO buffers.
PACKAGING
* Low power, 3.3 V CMOS technology. * Packaged in a 304-pin Ball Grid Array (BGA) packag... |
| Description |
From old datasheet system
|
| File Size |
99.64K /
2 Page |
View
it Online |
Download Datasheet |
| |
|
|
pmc
|
| Part No. |
2000453
|
| OCR Text |
...Order Path overhead. * Provides utopia Level 3 32-bit wide System Interface (clocked up to 104 MHz) with parity support for ATM applications. * Provides SATURN(R) POS-PHY Level 3TM 32-bit System Interface (clocked up to 104 MHz) for Packet ... |
| Description |
From old datasheet system
|
| File Size |
103.26K /
2 Page |
View
it Online |
Download Datasheet |
| |
|
|
Maxim
|
| Part No. |
DS3161
|
| OCR Text |
... PACKET PROCESSOR
POS-PHY or utopia
SYSTEM INTERFACE
DS316x
FEATURES
Single (DS3161), Dual (DS3162), Triple (DS3163), or Quad (DS3164) ATM/Packet PHYs for DS3, E3, and Clear-Channel 52Mbps (CC52) Pin Compatible fo... |
| Description |
Single/Dual/Triple/Quad ATM/Packet PHYs for DS3/E3/STS-1
|
| File Size |
3,627.41K /
385 Page |
View
it Online |
Download Datasheet |
| |
|
|
IDT
|
| Part No. |
IDT77V1264L200
|
| OCR Text |
...ards Compatible with 77V1254L25 utopia Level 1, utopia Level 2, or DPI-4 Interface 3-Cell Transmit and Receive FIFOs LED Interface for status signalling Supports UTP Category 3 and 5 physical media Low-Power CMOS 3.3V supply with 5V toleran... |
| Description |
Quad Port PHY
|
| File Size |
555.47K /
49 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
