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For phaselocked Found Datasheets File :: 178 Search Time::1.437ms
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				List of Unclassifed Manufacturers
Part No.	CS5828
OCR Text	... using CKIN. A copy of CKIN but phaselocked to the output serial streams, CLKOUT, is also converted to the fifth LVDS channel. The CS5828 offers a reliable communication media using LVDS signaling and provides low EMI dealing with wide, hig...
Description	28:4 LVDS Transmitter
File Size	175.07K / 13 Page	View it Online	Download Datasheet

				Zarlink Semiconductor Inc
Part No.	MT933 MT933CG MT933TP1N
OCR Text	...0 Clock Recovery circuit uses a phaselocked Loop (PLL) to derive a sampling clock from the incoming signal. The recovered clock runs at the symbol bit rate rate (nominally 125MHz) and is used to clock the MLT3 decoder and the Serial to Para...
Description	3.3V 10/100 Fast Ethernet Transceiver to MII
File Size	263.05K / 20 Page	View it Online	Download Datasheet

				List of Unclassifed Man... ETC[ETC] List of Unclassifed Manufacturers Electronic Theatre Controls, Inc.
Part No.	FS6370-01 11575-811 11575-801
OCR Text	...tems. Three EEPROM-programmable phaselocked loops (PLLs) driving four programmable muxes and post dividers provide a high degree of flexibility. An internal EEPROM permits just-in-time factory programming of devices for end user requirement...
Description	EEPROM Programmable 3-PLL Clock Generator IC
File Size	1,404.37K / 25 Page	View it Online	Download Datasheet

				Fairchild Semiconductor, Corp. FAIRCHILD[Fairchild Semiconductor]
Part No.	FIN1215 FIN1215MTDXNL FIN1216 FIN1216MTDXNL FIN1217 FIN121705 FIN1218MTD FIN1215MTD FIN1216MTD FIN1218
OCR Text	...tial Signaling) data streams. A phaselocked transmit clock is transmitted in parallel with the data stream over a separate LVDS link. Every cycle of transmit clock 21 bits of input LVTTL data are sampled and transmitted. The FIN1218 and FIN...
Description	LVDS 21-Bit Serializers/De-Serializers TRIPLE LINE DRIVER, PDSO48
File Size	451.97K / 17 Page	View it Online	Download Datasheet

				Maxim Integrated Products, Inc. MAXIM[Maxim Integrated Products]
Part No.	AN649
OCR Text	...their logic level. The use of a phaselocked loop (PLL) is essential in synchronizing the clock with the data stream, to ensure alignment of the clock with the middle of a data word. To further optimize the bit error rate (BER) in the presen...
Description	HFTA-04.0: Optical/Electrical Conversion in SDH/SONET Fiber Optic Systems
File Size	244.44K / 11 Page	View it Online	Download Datasheet

				SHARP[Sharp Electrionic Components] Sharp Corporation
Part No.	BSFZ BSFR BSFR53G03 BSFZ-SERIES
OCR Text	...local oscillators. The first is phaselocked loop-tuned using a 3-wire serial data bus. The second local oscillator is controlled by an analog voltage. All models provide a prescaler on the second LO output for complete control of the conver...
Description	Double Conversion IF Output Satellite Tuner Automotive Rectifier Diodes
File Size	66.69K / 2 Page	View it Online	Download Datasheet

				FAIRCHILD[Fairchild Semiconductor]
Part No.	FIN12AC_06 FIN12AC FIN12ACGFX FIN12ACMLX
OCR Text	...iring the DIRI pin. An internal phaselocked Loop (PLL) generates the required bit clock frequency for transfer across the serial link. Options exist for dual or single PLL operation, dependent upon system operational parameters. The device ...
Description	uSerDes Low-Voltage 12-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges
File Size	470.43K / 24 Page	View it Online	Download Datasheet

				Fairchild Semiconductor Corporation Fairchild Semiconductor, Corp. FAIRCHILD[Fairchild Semiconductor]
Part No.	FIN3385MTD FIN3383 FIN3383MTD FIN3385 FIN3385MTDX FIN3383MTDX
OCR Text	...tial Signaling) data streams. A phaselocked transmit clock is transmitted in parallel with the data steam over a separate LVDS link. Every cycle of transmit clock 28 bits of input LVTTL data are sampled and transmitted. These chipsets are a...
Description	CONNECTOR,HEADER,THRU,2 X 10,VERT,, 2MM TERMINAL STRIPS 低电28位平板显示器连接串行 Low Voltage 28-Bit Flat Panel Display Link Serializers
File Size	280.27K / 9 Page	View it Online	Download Datasheet

				FAIRCHILD[Fairchild Semiconductor]
Part No.	FIN3386MTD FIN3383 FIN3383MTD FIN3384 FIN3384MTD FIN3385 FIN3386 FIN3385MTD
OCR Text	...tial Signaling) data streams. A phaselocked transmit clock is transmitted in parallel with the data stream over a separate LVDS link. Every cycle of transmit clock 28 bits of input LVTTL data are sampled and transmitted. The FIN3386 and FIN...
Description	Low Voltage 28-Bit Flat Panel Display Link Serializers/Deserializers
File Size	545.75K / 18 Page	View it Online	Download Datasheet

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