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For ddr-i Found Datasheets File :: 5337 Search Time::2.062ms
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				ELPIDA[Elpida Memory]
Part No.	HM5425161B HM5425161BTT-10 HM5425161BTT-75A HM5425161BTT-75B HM5425401B HM5425401BTT-10 HM5425401BTT-75A HM5425401BTT-75B HM5425801B HM5425801BTT-10 HM5425801BTT-75A HM5425801BTT-75B
OCR Text	DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword x 16-bit x 4-bank/8-Mword x 8-bit x 4-bank/ 16-Mword x 4-bit x 4-bank E0086H20 (Ver. 2....I/O bus Column decoder Sense amplifier & I/O bus Row decoder Column decoder Sense amplifier & I/O...
Description	256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 】 16-bit 】 4-bank/8-Mword 】 8-bit 】 4-bank/ 16-Mword 】 4-bit 】 4-bank 256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 16-bit 4-bank/8-Mword 8-bit 4-bank/ 16-Mword 4-bit 4-bank
File Size	472.06K / 65 Page	View it Online	Download Datasheet

				INFINEON[Infineon Technologies AG]
Part No.	HYB18T256400AC HYS72T64020GR-5-A HYB18T256800AC HYS72T32000GR HYS72T32000GR-37-A HYS72T32000GR-3-A HYS72T32000GR-5-A HYS72T64001GR HYS72T64001GR-37-A HYS72T64001GR-3-A HYS72T64001GR-5-A HYS72T64020GR HYS72T64020GR-37-A HYS72T64020GR-3-A
OCR Text	... 640 20 GR (5 12 M B y t e ) DDR 2 Reg istered D IMM Modu les M em or y P r od uc t s Never stop thinking. HYS72T32000GR, HYS72T64...I/O reference supply Ground EEPROM power supply Register and PLL control pin 2) No connection Clo...
Description	DDR2 Registered DIMM Modules
File Size	455.08K / 24 Page	View it Online	Download Datasheet

				INFINEON[Infineon Technologies AG]
Part No.	HYB25D256400BT HYB25D256800BTL-8 HYB25D256160BC-6 HYB25D256160BC-7 HYB25D256160BC-7F HYB25D256160BC-8 HYB25D256160BCL-6 HYB25D256160BCL-7 HYB25D256160BCL-7F HYB25D256160BCL-8 HYB25D256160BT-6 HYB25D256160BT-7 HYB25D256160BT-7F HYB25D256160BT-8 HYB25D256160BTL-6 HYB25D256160BTL-7 HYB25D256160BTL-7F HYB25D256160BTL-8 HYB25D256400BC-6 HYB25D256400BC-7 HYB25D256400BC-7F HYB25D256400BC-8 HYB25D256400BCL-6 HYB25D256400BCL-7 HYB25D256400BCL-7F HYB25D256400BCL-8 HYB25D256400BT-6 HYB25D256400BT-7 HYB25D256400BT-7F HYB25D256400BT-8 HYB25D256400BTL-6 HYB25D256400BTL-7 HYB25D256400BTL-7F HYB25D256400BTL-8 HYB25D256800BC-6 HYB25D256800BC-7 HYB25D256800BC-7F HYB25D256800BC-8 HYB25D256800BCL-6 HYB25D256800BCL-7 HYB25D256800BCL-7F HYB25D256800BCL-8 HYB25D256800BT-6 HYB25D256800BT-7 HYB25D256800BT-7F HYB25D256800BT-8 HYB25D256800BTL-6 HYB25D256800BTL-7 HYB25D256800BTL-7F
OCR Text	...8 mm. Description The 256Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 268,435,456 bits. It is internally c...I/O pins. A single read or write access for the 256Mb DDR SDRAM effectively consists of a single 2n-...
Description	256-Mbit Double Data Rate SDRAM, Die Rev. B
File Size	1,838.18K / 77 Page	View it Online	Download Datasheet

				Intersil
Part No.	ISL6420
OCR Text	...buck converter applications and DDR termination supplies, as well as a voltage margining mode for system testing in networking DC-DC convert...I" suffix) Junction Temperature Range. . . . . . . . . . . . . . . . . . . -40C to 125C CAUTION: ...
Description	Small PWM Controller/Driver IC
File Size	475.20K / 17 Page	View it Online	Download Datasheet

				SAMSUNG[Samsung semiconductor] Samsung Electronic
Part No.	KM48L16031BT-GF0 KM48L16031BT-GFY KM48L16031BT-GFZ KM416L8031BT-GF0 KM416L8031BT-GFZ KM416L8031BT-GFY DDRSDRAM KM48L16031BT-G_FZ KM416L8031BT-G_F0 KM416L8031BT-G_FY KM44L32031BT-G_F0 KM44L32031BT-G_FY KM44L32031BT-G_FZ KM48L16031BT-G_F0 KM48L16031BT-G_FY KM44L32031BT-GFZ KM44L32031BT-GF0 KM44L32031BT-GFY KM416L8031BT-F0 KM44L32031BT-GZ KM48L16031BT-GZ
OCR Text	DDR SDRAM Target DDR SDRAM Specification Version 0.61 - 1 of 63 - REV. 0.61 August 9. '99 128Mb DDR SDRAM Revision History ...I/O capacitance values Version 0.4(Feb,1999) -Added DDR SDRAM history for reference(refer to the fol...
Description	128 Mb DDR SDRAM. Version 0.61, Operating freq. 100 MHz, speed 10ns. DDR SDRAM Specification Version 0.61 128Mb DDR SDRAM 128 Mb DDR SDRAM. Version 0.61, Operating freq. 133 MHz, speed 7.5 ns.
File Size	748.00K / 49 Page	View it Online	Download Datasheet

				MOTOROLA[Motorola, Inc]
Part No.	MPC5200BV400 MPC5200CBV266 MPC5200CBV400 MPC5200ID SPC5200CBV400
OCR Text	...e. The MPC5200 contains a SDRAM/DDR Memory Controller, a flexible External Bus Interface, PCI Controller, USB, ATA, Ethernet, six Programmab...I/O buffers Supply voltage - System APLL Supply voltage - G2_LE APLL Input voltage (VDD_IO) Input vo...
Description	MPC5200 Hardware Specifications
File Size	921.66K / 76 Page	View it Online	Download Datasheet

				Alliance Semiconductor, Corp. ALSC[Alliance Semiconductor Corporation]
Part No.	ASM4SSTVF16857 ASM4SSTVF16857-48VT ASM4SSTVF16857-48TR ASM4SSTVF16857-48TT ASM4SSTVF16857-48VR
OCR Text	DDR 14-Bit Registered Buffer ASM4SSTVF16857 LVCMOS level at a valid logic state since VREF may Features * Fully JEDEC JC40 - JC42....I/O levels, and is fully compliant with the JEDEC JC40, JC42.5 DDR I specifications covering PC1600,...
Description	DDR 14-Bit Registered Buffer SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48 Specialty Clock Management
File Size	147.94K / 16 Page	View it Online	Download Datasheet

				Alliance Semiconductor Corp... ALSC[Alliance Semiconductor Corporation]
Part No.	ASM4SSTVF16859 ASM4SSTVF16859-64TT ASM4SSTVF16859-56QR ASM4SSTVF16859-56QT ASM4SSTVF16859-64TR
OCR Text	DDR 13-Bit to 26-Bit Registered Buffer ASM4SSTVF16859 off. Note that RESETB should be supported with a Features Differential clo...I/O levels, and is fully compliant with the JEDEC JC40, JC42.5 DDR I specifications covering PC1600,...
Description	DDR 13-Bit to 26-Bit Registered Buffer Specialty Clock Management CONNECTOR ACCESSORY
File Size	163.36K / 16 Page	View it Online	Download Datasheet

				Alliance Semiconductor ... ALSC[Alliance Semiconductor Corporation]
Part No.	ASM4SSTVF32852 ASM4SSTVF32852-114BT ASM4ISSTVF32852-114BR ASM4ISSTVF32852-114BT ASM4SSTVF32852-114BR
OCR Text	DDR 24-Bit to 48-Bit Registered Buffer ASM4SSTVF32852 Features Differential clock signals. Supports SSTL_2 class II specifications ...I/O levels except for the LVCMOS RESETB input. Data flow from D to Q is controlled by the differenti...
Description	DDR 24-Bit to 48-Bit Registered Buffer SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA114 Specialty Clock Management 2.3 V -2.7 V, DDR 24-bit to 48-bit registered buffer
File Size	106.12K / 13 Page	View it Online	Download Datasheet

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