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  two-pll Datasheet PDF File

For two-pll Found Datasheets File :: 14193    Search Time::1.078ms    
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    ICS9179-06 ICS9179F-06

ICST[Integrated Circuit Systems]
Part No. ICS9179-06 ICS9179F-06
OCR Text ...t the data is ignored for those two bytes. The data is loaded until a Stop sequence is issued. At power-on, all registers are set to a default condition, as shown. 3 ICS9179-06 ICS9179-06 Power Management The values below are estimat...
Description Zero Delay Buffers

File Size 459.54K  /  8 Page

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    ICS9179B-01 ICS9179BF-01

ICST[Integrated Circuit Systems]
Part No. ICS9179B-01 ICS9179BF-01
OCR Text ...t the data is ignored for those two bytes. The data is loaded until a Stop sequence is issued. In the power down mode (PWR_DWN# Low), the SDATA and SCLK pins are tristated and the internal data latches maintain all prior programming informa...
Description Low Skew Buffers

File Size 510.52K  /  9 Page

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    ICS9248-101 ICS9248YG-101-T AV9248F-101-T AV9248G-101-T ICS9248F-101-T

ICST[Integrated Circuit Systems]
Integrated Device Technology, Inc.
Part No. ICS9248-101 ICS9248YG-101-T AV9248F-101-T AV9248G-101-T ICS9248F-101-T
OCR Text ...t the data is ignored for those two bytes. The data is loaded until a Stop sequence is issued. At power-on, all registers are set to a default condition, as shown. 3 ICS9248-101 Functionality VDD = 3.3V5%, VDDL= 2.5V5% or 3.35%, TA=...
Description Frequency generator and intefrated buffer for Pentium/PRO and K6
Frequency Generator & Integrated Buffers for PENTIUM/ProTM & K6
Frequency Generator & Integrated Buffers for PENTIUM/ProTM & K6 频率发生

File Size 360.74K  /  17 Page

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    ICS9248-103 ICS9248YF-103 ICS9248F-103

Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
Part No. ICS9248-103 ICS9248YF-103 ICS9248F-103
OCR Text ...t the data is ignored for those two bytes. The data is loaded until a Stop sequence is issued. At power-on, all registers are set to a default condition, as shown. 3 ICS9248-103 Functionality VDD = 3.3V5%, VDDL = 2.5V5% or 3.35%, TA...
Description Frequency Generator & Integrated Buffers for PENTIUM/ProTM
Frequency generator and intefrated buffer for Pentium/PRO

File Size 390.58K  /  16 Page

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    ICS9248-112 ICS9248YF-112-T ICS9248YF-112 ICS9248YF-112LF AV9248F-112

ICST[Integrated Circuit Systems]
Integrated Device Technology, Inc.
Part No. ICS9248-112 ICS9248YF-112-T ICS9248YF-112 ICS9248YF-112LF AV9248F-112
OCR Text ...t the data is ignored for those two bytes. The data is loaded until a Stop sequence is issued. At power-on, all registers are set to a default condition, as shown. 6. Third party brands and names are the property of their respective o...
Description Frequency generator and integrated buffer for Celeron and PII/III
Frequency Generator & Integrated Buffers for Celeron & PII/III⑩
150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48

File Size 383.27K  /  12 Page

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    ICS9248-126 ICS9248YF-126-T ICS9248YF-126LF-T ICS9248F-126-T AV9248F-126-T

ICST[Integrated Circuit Systems]
Integrated Device Technology, Inc.
Amphenol, Corp.
Part No. ICS9248-126 ICS9248YF-126-T ICS9248YF-126LF-T ICS9248F-126-T AV9248F-126-T
OCR Text ...t the data is ignored for those two bytes. The data is loaded until a Stop sequence is issued. At power-on, all registers are set to a default condition, as shown. 6. Third party brands and names are the property of their respective o...
Description Frequency generator and integrated buffer for Celeron and PII/III and K6
Frequency Generator & Integrated Buffers for Celeron & PII/III⑩ & K6
Single Chip, SIS 540/630 System Clock with AMD 533MHz Freq. and Overclocking
Frequency Generator & Integrated Buffers for Celeron & PII/III & K6
150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48
Peripheral IC 外围芯片

File Size 469.51K  /  12 Page

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    ICS9248-192 ICS9248YG-192-T

Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
http://
Part No. ICS9248-192 ICS9248YG-192-T
OCR Text ...t the data is ignored for those two bytes. The data is loaded until a Stop sequence is issued. At power-on, all registers are set to a default condition, as shown. 6. 0540E--08/20/03 4 ICS9248-192 Serial Configuration Command...
Description Single Chip Clock for Transmeta
Frequency Timing Generator for Transmeta Systems

File Size 102.92K  /  12 Page

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    ICS9248-20 ICS9248F-20 AV9248F-20

ICST[Integrated Circuit Systems]
Part No. ICS9248-20 ICS9248F-20 AV9248F-20
OCR Text ...ges for 100/33.3MHz) 1.5 to 4ns Two fixed outputs at 48MHz. Separate 2.5V and 3.3V supply pins 2.5V or 3.3V output: CPU, IOAPIC 3.3V outputs...PLL core VDD1 = REF (0:2), X1, X2 VDD2 = PCICLK_F, PCICLK (0:6) VDD3 = 48MHz0, 48MHz1 VDDL1 = IOAPIC...
Description Pentium/PRO system clock chip
Pentium/ProTM System Clock Chip

File Size 340.17K  /  11 Page

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    ICS9248-39 ICS9248YF-39 AV9248F-39

ICST[Integrated Circuit Systems]
Part No. ICS9248-39 ICS9248YF-39 AV9248F-39
OCR Text ...y transitions. Features include two CPU, six PCI and thirteen SDRAM clocks. Two reference outputs are available equal to the crystal frequen...PLL core VDD4 = 24MHz, 48MHz VDDL1 = IOAPIC VDDL2 = CPUCLK 1, CPUCLK_F Pentium is a trademark of In...
Description Frequency generator and integrated for Pentium/PRO
Frequency Generator & Integrated Buffers for PENTIUM/ProTM
Integrated Circuit Systems

File Size 290.92K  /  16 Page

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    ICS9248-55 ICS9248BF-55

ICST[Integrated Circuit Systems]
http://
Part No. ICS9248-55 ICS9248BF-55
OCR Text ...ges for 100/33.3MHz) 1.5 to 4ns Two fixed outputs at 48MHz. Separate 2.5V and 3.3V supply pins 2.5V or 3.3V output: CPU, IOAPIC 3.3V outputs...PLL core VDD1 = REF (0:2), X1, X2 VDD2 = PCICLK_F, PCICLK (0:6) VDD3 = 48MHz0, 48MHz1 VDDL1 = IOAPIC...
Description Pentium/Pro/IITM System Clock Chip 奔腾/专业/ IITM系统时钟芯片
BX Main Clock, Supports 66.6 - 100MHz

File Size 268.23K  /  10 Page

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For two-pll Found Datasheets File :: 14193    Search Time::1.078ms    
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